Re: The clock register

[Antoine Vignau <antoine.vignau@laposte.net>]

* __7______6______5______4______3______2______1______0___
*|      |      |      |      |      |      |      |      |
*|                                                       |
*|                  Clock data register                  |
*|                                                       |
*|______|______|______|______|______|______|______|______|
*               ^^^^^  CLOCKDATA Byte ^^^^^

* CLOCKDATA bits defined as follows
*    bit 7,6,5,4,3,2,1,0 -- Data passed to/from clock chip

CLOCKDATA		EQUDS.B	1	;Clock data register

* __7______6______5______4______3______2______1______0___
*|      |      |      |      |      |      |      |      |
*| Clock| Read/|Chip  |      |                           |
*| xfer |Write |enable|Unused|        Border Color       |
*|      | chip |assert|      |                           |
*|______|______|______|______|______|______|______|______|
*               ^^^^^  CLOCKCTL Byte ^^^^^

* CLOCKCTL bits defined as follows
*    bit 7= Set =1 to start transfer to clock
*           Read =0 when transfer to clock is complete
*    bit 6= 0= write to clock chip -- 1= read from clock chip
*    bit 5= Clock chip enable asserted after transfer 0=no 1=yes
*    bit 4= unused
*    bit 3,2,1,0 = select border color (see TBCOLOR for values)

CLOCKCTL		EQUDS.B	1	;Clock control register