Re: What Is The Difference Between 68000 Chip And 80x86 Chip?

[dempson@actrix.gen.nz (David Empson)]

Paul Schlyter <pausch@saaf.se> wrote:

> In article <1f3x0ks.7ta1x6r3r2u8N%dempson@actrix.gen.nz>,
> David Empson <dempson@actrix.gen.nz> wrote:
>  
> > - The 6800 has a single 16 bit index register (X), and the only indexing
> > method supported is "constant 8 bit unsigned offset from X", which is
> > implemented pretty uniformly on the core instructions; the 6502 has two
> > 8 bit index registers (X and Y), with a mixture of addressing modes
> > (zero page or absolute indexed, indirect with pre-indexing or
> > post-indexing depending on the register) with the full set only being
> > available on a limited group of instructions.
>  
> I've been programming both the 6800 and the 6502 in assembly, and I
> found the single 16-bit index register of the 6800 more awkward than
> the dual 8-bit index registers of the 6502: the latter were clearly
> superior when you needed to move a block of data, less than 256 bytes
> large, from one address to another address more than 256 bytes away,
> which wasn't an uncommon situation.

I agree.  The most efficient way I could find to implement a memory move
routine on the Hitachi 6303 (a 6801/6803 derivative with extra
instructions) was to use self-modifying code to specify the source and
use the X register for the destination (or vice versa).

It would probably be even worse on the 6800, since it doesn't support
the "D" register, which is a 16-bit accumulator formed by concatenating
the A and B registers (a new feature added in the 6801/6803).

If you are using a compiled high-level language, the 6800 is generally
better than the 6502 due to the larger stack, but it has to waste a lot
of instructions shuffling data in and out of the X register.

The 68HC11 (derived from the 6801) added a second 16-bit index register
(Y), implemented through a prefix byte before the opcode (hence any use
of Y is slower than using X and requires more code).  This would be a
big help for operations like memory moves.

> > - The 6800 has a 16 bit stack pointer, while the 6502's one is 8 bits.
>  
> The 6502's stack pointer is sometimes called a "9-bit" pointer, however
> the high bit is then always implicitly 1.  The limited stack space
> of the 256 could sometimes be a real problem.

I've never heard it called "9-bit".  It is just an 8-bit stack pointer
with the CPU outputting a fixed value for the upper 8 bits of the
address (00000001) whenever a stack access occurs.

> > - They have different methods of supporting BCD arithmetic (6800 has a
> > decimal adjust instruction, 6502 has a decimal mode of operation which
> > affects the behaviour of the add and subtract instructions).
>  
> The 6502 had a "decimal flag" in its flag register: when set, ADC and SBC
> would work in BCD; when clear, they would work in binary.

The D flag is actually the "decimal mode" flag.  I was trying to avoid
posting too much detail.  :-)