Re: ROM 3 Questions

[dempson@actrix.gen.nz (David Empson)]

william strutts <wrstrutts1@home.com> wrote:

> I have two ROM 3 motherboards.  They are basically identical
> except for the actual ROM's.  The First machine has two ROM's
> marked 341-0748 and 341-0737.  The Control Panel Screen
> for this machine shows the options: Control Panel, Alternate
> Screen Mode.  The second machine has these ROM's marked
> 341-0728 and 341-0748 (this is a different size ROM than the
> other machine, it is four pins shorter than the other Machine).

Are you sure about the "341-0748" numbers being the same in both cases,
but in a different socket?  That can't be right, unless someone has
mislabelled one of them.  The same part number in a different socket
implies the ROM is in the wrong socket, but the machine wouldn't start
up in that case.

I assume you've just listed them in opposite orders, and the ROMs in
question are actually in the same socket.

One of the machines probably has a pre-release version of the firmware
(most likely to be the 341-0728 ROM).  I don't have my ROM 3 handy, so I
can't check it against my own machine.  I recall looking into this
several years ago.

I don't remember the details off the top of my head, but there was only
a very minor change between the beta and final version of the ROM 3
firmware, consisting of one initialization routine somewhere in the
memory manager, I think.  My previous posting on the subject predates my
current News software, so I don't have a copy of my earlier posting on
hand.

> The Control Panel Screen shows Control Panel, Alternate Screen
> Mode, Visit Monitor and Memory Peeker.

The Visit Monitor and Memory Peeker CDAs are available on all ROM 1 and
ROM 3 machines, but they aren't supposed to be visible until you go into
the monitor and use the # command.

There is a minor bug in the ROM 3 firmware which means that it doesn't
initialize the memory location which determines whether or not these
CDAs are enabled.  When you power on the computer, the vast majority of
machines happen to start up with this location set to zero, so these
CDAs do not appear until you use the # command.

For a very small number of ROM 3 machines, this location happens to
contain a different value when powered on (probably FF), so these CDAs
appear at startup.

This behaviour is an artifact of dynamic RAM - it tends to power up with
a particular pattern of values, and this will be reasonably consistent
for the same memory chip.

I know that Mitchell Spector's ROM 3 has this particular behavioural
glitch.  I only recall ever hearing about one other machine which does
it.

(There is another possibility: the beta firmware version might
deliberately turn on these CDAs, but I don't recall noting that
behaviour when I examined the differences.)

> Why is there the obvious chip size difference between the ROM's?

The type of ROM chips normally used in the IIgs are a 28-pin 128Kx8 mask
programmed ROM.  Mask programmed ROMs are the most reliable type, but
they are only cost effective if produced in large quantities (thousands
at a time).

For prototyping and development purposes, Apple would have used EPROM
chips (Erasable Programmable Read Only Memory).

An EPROM requires at least one and sometimes two pins which are not
required on a mask programmed ROM: programming voltage and program
enable.  (Some also have an output enable pin, separate from the
required chip select pin.)

For a 128KBx8 EPROM, the minimum number of pins you need is 17 (address)
+ 8 (data) + 3 (power, ground, programming voltage) + 1 (chip select).
This gives a total of 29, so there is no way you can use a 28 pin
package for this capacity EPROM.  The next largest standard package size
is 32 pins.

After the development phase, if Apple was producing a small number of
machines for an initial production run, they may have used PROMs instead
of masked ROMs (much cheaper for small quantities).  The type of PROM
used would have been identical to an EPROM, except it comes in a plastic
case (EPROMs are ceramic) and would be missing the window for erasing.
Since it has the same signal requirements as the EPROM, it would also
need to be in a 32 pin package.

The ROM 3 motherboard (and possibly also the ROM 1 - I haven't looked
recently) has provision for using either a 32 pin EPROM/PROM or a 28 pin
masked ROM.  A 28 pin chip goes in the bottom end of the socket, so
there would be four unused pins at the top.