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Re: 65816

David Empson wrote:

>Accelerators on the Apple II do not and cannot change the bus speed,
>since the master system clock is tied into everything, including the
>video output.
>
>They all operate on caching techniques, keeping a copy of data read from
>real memory in fast RAM on the accelerator.
>
>As far as I know, none of the 8-bit accelerators can handle DMA, but
>both the ZipGS and TransWarp GS can.
>
>At least one of the 8-bit accelerators provides enough fast RAM on the
>card to replace the entire address space of the machine, with the
>exception of I/O areas and video buffers.
>
>In theory, the same could be achieved with the IIgs, as long as you
>could get at least 4 MB of RAM (preferably more like 8.5 MB) on the
>accelerator.

Which, of course, could now be done with one x8 DRAM chip (although
two x4's might be a little cheaper).

-michael

 Email:  mjmahon@aol.com
 Home page:  http://members.aol.com/MJMahon/