Re: IIc RGB port pinouts...

[dempson@actrix.gen.nz (David Empson)]

Tony Cianfaglione <ab616@chebucto.ns.ca> wrote:

> Could someone please post the pinouts for the raw signal port (db15) RGB
> on a IIc?

Don't call it an RGB port, because it isn't one.  It is the "Video
Expansion Connector".

Here is the pinout (courtesy of IIc technical reference manual, which
happened to be on top of the pile within arm's reach):

1  TEXT          9  PRAS*
2  14M           10 GR
3  SYNC*         11 SEROUT*
4  SEGB          12 NTSC
5  1VSOUND       13 GND
6  LDPS*         14 VIDD7
7  WNDW*         15 CREF
8  +12V

The various signals are video mode, clocks, etc.  An asterisk indicates
an active low signal.

Assuming you need a little more detail, here are the descriptions from
the table immediately after the diagram.  If you need yet more
information, I'd suggest getting the technical reference manual (or
Understanding the IIe).

Pin  Deriv  Name     Description

1    Phi0   TEXT     Video text signal from TMG; set to inverse of GR,
                     except in double-high-resolution mode

2           14M      14 MHz master timing signal from system oscillator

3    Q3     SYNC*    Displays horizontal and vertical synchronization
                     signal from IOU pin 39

4    PRAS   SEGB     Displays vertical counter bit from IOU pin 4; in
                     text mode indicates second low-order vertical
                     counter; in graphics mode indicates low-resolution

5           1VSOUND  One-volt sound signal from pin 5 of the audio
                     hybrid circuit (AUD)

6    14M    LDPS*    Video shift-register load enable from pin 12 of TMG

7    PRAS   WNDW*    Active area display blanking; includes both
                     horizontal and vertical blanking

8           +12V     Regulated +12 volts DC; can drive 300 mA

9    14M    PRAS*    RAM row-address strobe from TMG pin 19

10   PRAS   GR       Graphics mode enable from IOU pin 2

11   14M    SEROUT*  Serialized character-generator output from pin 1 of
                     the 74LS166 shift register

12          NTSC     Composite NTSC video signal from VID hybrid chip

13          GND      Ground reference and supply

14   Phi0   VIDD7    From 74LS374 video latch; causes half-dot shift if
                     high

15   14M    CREF     Color reference signal from TMG pin 3; 3.58 MHz

(All of the above assumes an NTSC IIc.  A PAL one presumably has
appropriate changes, such as a different colour reference frequency,
slightly different 14M frequency, etc.)

Note that the NTSC pin is the same as the composite video output, but
has different load characteristics (it is generated in parallel by a
video output chip called VID, and is missing a series inductor and
capacitor to ground).  The "VID" chip takes SEROUT*, SYNC*, CREF* and
CLRGAT* as inputs, producing NTSC and the composite video output.
(CLRGAT* is an output from the IOU.)