Re: Apple II benchmarks

[Roy and/or Janet Miller <millers@inetnebr.com>]

Paul Schlyter wrote:

> That's because the 8088 didn't have hardware multiply/divide.  It was
> implemented in microcode, and one mul or div took some 100-150 cycles
> to execute on the 8088.  On the 80188 this had been cut down to about
> 30 cycles -- but you didn't compare the 6502 to the 80188, did you?
>

As stated above Paul, Byte magazine did the comparison in 1985, and they were
dealing with a product review for an 8086-2 based computer. That's why there was
no comparison to an 80186

>
> The 4.77 MHz PC did indeed not perform particularly well: its clock
> speed was slow,

but faster than most Z-80 computers (most as in the millions of Kaypros, TRS-80
Models, 1, 3, 4, Osborne, and hordes of other CP/M machines)

> and it still had an 8-bit external bus.  I remember
> quite well how my 6 MHz Z80 card in the Apple II often outperformed
> the 4.77 MHz PC, except on floating-point intensive code, where the
> 8087 in the PC did give a speed advantage the Apple II was unable to
> catch up on.

Of course that isn't a comparison between an Apple II and a PC, but between the
CP/M computer in the Apple and the PC. But take an Apple II that had a numeric
coprocessor board installed (and there were such available) and it might have
blown the doors off the Intel 8087 equipped machine too. I found it interesting
that the spreadsheet test was floating point math, and the Apple at one fifth
the clock speed was crunching numbers in only twice the time of the PC. I wonder
what spreadsheet was used? Multiplan?

Roy