Re: www.6502.org

[albaugh@agames.com (Mike Albaugh)]

David Wilson (david@uow.edu.au) wrote:
: zefram@daystrom.bog (Zefram Cochrane) writes:
: >Oooh. Err. I remember those funny instructions on the 6502. The parts
: >that I was using (10 y ago) had the inc and dec instructions swapped
: >round! (65C12 and 50743 IIRC)

: I don't remember any chips with broken inc/dec.

	Perhaps it depends on your definition of "broken". On the original
6502, INC/DEC of memory locations in the various complex address-modes
"worked", but also clobbered the accumulator. That may be why the official
opcode list doesn not include, e.g. INC @(fred,X). But if you "follow the
grammar" and build waht would _plausibly_ be that instruction, you indeed
get the result you might expect, plus a clobbered ACC :-) I have always
assumed that they intended these instructions to work, but when they
didn't, MOS just deleted them from the documentation.

: I do know that the first
: revision of the 6502 did not have one of ROL or ROR.

	It was ROR. My 6501 does not have ROR. Neither did some the
6502's used in my first 6502-based product. Not crucial, but pretty
annoying when one is trying to do arithmetic. In case some readers
aren't "way into" the 6502, it did not have ASR, so you would do
	CMP #$80
	ROR

if you _had_ ROR. I don't remember what you did if you didn't have ROR,
but it was slow. Probably something like

	CMP #$80
	BCC .l1
	LSR
	BPL .l2
.l1:
	LSR
	ORA #$80
.l2:

	or

	CMP #$80
	PHP
	LSR
	PLP
	BCC .l1
	ORA #80
.l1


: Microsoft's 6502 BASIC
: for the OSI was written to work around this (making it slower) even though
: by then all the 6502s had both instructions.

	That sounds just silly. A run-time test and patch of the math
routines would have been nearly trivial. Onesy-twosy stuff could stay
back-ward compatible, but I'd hate to have, say, my multiply routine
hobbled unnecessarily.

						Mike
| albaugh@agames.com, speaking only for myself