Re: Apple //c smartport compact flash adapter

[mdj <mdj.mdj@gmail.com>]

On Jan 29, 3:15 pm, Robert Justice <rjust...@internode.on.net> wrote:
> I'm confident it would work ok on the IIc+. From a timing point of
> view with the smartport, it should not have changed.

I agree, something would have to be very marginal in your timing to
have problems with any SmartPort implementation, of which there are
many.

The IIc+ is probably largest portion of this devices "target market".
The only issue I see is that the IIc+ is rather dependent on having an
external 5.25" disk drive to run a lot of 8-bit software.

Are you considering implementing the hardware side of the SmartPort
bus arbitration protocol ? Gating the select lines (perhaps with a tri-
statable buffer) on PH0+PH2, or PH1+PH3 seems all that's required to
support 'dumb' devices being daisy chained off the end.

Allowing daisy chained SmartPort devices (less necessary IMO other
than for completeness) seems only to require gating the two phase
lines (I forget which) that signal a bus INIT, since IIRC smartport
devices respond to device INIT requests until they run out of devices/
partitions, then stop gating the phase lines so that the next
smartport device may see INIT.

Matt