A2GS Accelerator Thoughts

[doug.cotton@cmdweb.com (Doug Cotton)]

While I posted this at the "Upgrade the A2GS" site, I thought I'd
also repost it here for those who don't frequent that area.

Some observations on the suggested accelerator design:

> Accelerator:
> 
> A IIgs with a Transwarp installed is faster than stock, but it is 
> still slow. The Zip and Transwarp boards have lots of chips to 
> interface the cards with the 1mhz bus speed. 
> 
> It would be difficult to interface a card with the slow bus, and 
> the resulting acceleration isn't that great, and over a certain point
> (about 12 Mhz??), there is **NO** speed increase, because the bus
> just cannot transmit data that fast. I boosted my Transwarp from 
> 7Mhz to 12.5Mhz, and the speed increase was noticeable, but I want
> more!
> 
> 
> Thats why I think any NEW accelerator made TODAY should have the 
> following:
> 
> Fast 65816 emulator (40Mhz for the IIgs would *FLY*)

Even using some of the fastest processors around (which are VERY
EXPENSIVE) you'll be lucky to achieve 40 MHz emulation of the 65816.
A 400 MHz processor might get you close, though I suspect you'd be
nearer to 30 MHz than 40, and the processor itself will cost hundreds
of dollars. I doubt such an approach has much of a chance at being
commercially viable.

Using a standard 65816 at 20 MHz is probably about the best you'll do
at this point in time... you might push it a little higher, but it
won't be easy.

When I met with Bill Mensch in February of 1997, he indicated at that
time that another die shrink (for the 65816) may not be far off, and
that the processor should be capable of 40 MHz at that point.

However, our own experience indicates that getting other components
to work with the processor at that speed is by no means simple, and
may very well be near impossible. The speed of most RAM chips, for
example, is typically rated at 2 vdc. The 65816's architecture calls
for much higher voltages to establish a 'high' condition, and we find
that the speed of RAM chips falls off dramatically above 2 volts. If
a lot of components are attached to the bus lines, the added capacitance
adversely affects performance even more. We had great difficulty getting
even 20 MHz operation reliably with these factors in our C64/128
accelerator design. I doubt very much that the speed of any accelerator
using the 65816 will go much beyond the 20 MHz mark.

> RAM on card
> ROM is copied into Accelerator RAM
> Interface to the 1Mhz bus to access Slots.
> 
> This has the following advantages:
> 
> You don't have to access the RAM through the slow bus. 
> ROM does not have to be accessed through the slow bus either.
> All existing peripheral cards can be used (although accessed at 1Mhz)

These things will get you fairly close to true 20 MHz performance. Our own
C-64/128 accelorator is based on this type of operation.

> This creates the following problems:
> 
> Video RAM is on Card. The IIgs motherboard cannot display the video, due
> to the fact the Accelerator is running at high speeds. 
> A 65816 emulator has to be coded for the Fast processor on the Accelerator.

Some problems need not occur. Again, drawing on our C-64/128 accelerator design,
the video RAM is merely shadowed into the computer. Reading from RAM always
comes
from the high-speed RAM on the accelerator, while writing goes to both the
accelerator RAM and the host computer RAM. If video RAM is in a fixed location,
the range can be detected in real-time by the hardware to determine if writing
through to the computer RAM is necessary. Such a 'write-through' can further be
enhanced by cacheing the byte to be written through, allowing the processor
itself
to continue to process the next instruction without waiting until synchonization
with the host bus occurs. While you can only squeeze one byte through into
the host
in a single cycle at the host's maximum speed, this is often ample to avoid
slowdowns
for all but the tightest loops writing to video RAM.

I/O needs to be handled somewhat differently... both reads and writes need to be
limited to the speed of the host I/O. However, since there is often much other
processing time involved in working with the data to be read or written,
again you'll
tend to get pretty good performance for such operations.

-- 
Doug Cotton <doug.cotton@cmdweb.com>

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