ARM and 6502

[regnirps@aol.com (Regnirps)]

Well, here are my preliminary emulation estimates. I predict about a 7/4 cycle
ratio in ARM cycles/6502 cycles in a simple interpretive emulator. In other
words no just-in-time compiling or pther optimizations.

For the 40 MHz ARM7500 with its 4K cache, the emulator code would be in cache
most of the time or could be kept in no-wait state SRAM. This would give 6502
emulation equivalent to a 23 MHz 6502 and the new 60 MHz 7500 from Cirrus would
be equivalent to a 34 MHz 6502. The SA110 as used in the last Newtons
(StrongARM) does 200 MHz and would emulate a 114 MHz 6502 while using less
power than the original 6502 chip.

More sophisticated emulation could scan the code ahead of time and do
optimizations. Also, for those writing new programs, some of the more common
groups of instructions could be written as macros that become pure ARM
instructions. Examples like 16 bit and 32 bit multiplication or addition and
compares and shifts come to mind. The ARM can shift any number of bit positions
in a single cycle since it uses a barrel shifter.

So, who wants to work on this?

Charlie Springer