Re: Zip GS questions

[rubywand@aol.com]

In article <32B0AACE.3D42@prodigy.net>, Barry Rees
<Barry.Rees@prodigy.net> writes:

>....
> I did some serious testing about nine months ago and had better results
than I
>had hoped for, but not stable enough to continue using. While I was able
>to reach 16 MHz speed for sustained periods of time with 15ns SRAMs
>(from JDR) in the TAG sockets and 45ns Sony SRAMs in the data sockets,
>my system would randomly crash with $0201 memory error. With additional
>testing, I came to the conclusion that (possibly) the 15ns SRAMs were
>actually too fast to use with the rest of my hardware setup. ....


     It does seem that very fast RAM can lead to bombs. One problem is
that while fast RAM can be ready to read/write very quickly, it can, also,
quickly be disabled. The Data Available latency and R/W enable for RAM
allowed by the original design could end up disabling fast RAM before
write Data is stable (or, even, available); and, Read Data may be gone by
the time Zip is ready to get it.

     The way to simplify Zip GS speed-up mods is to get some info on Zip
bus signal (RAM R/W, etc.) timing. Is this available?
     



Rubywand