Re: Apple Drops Backward Compatibility for Next MacOS

[dempson@actrix.gen.nz (David Empson)]

David Every <dke@adnc.com> wrote:

> In article <553ih7$1o6i@r02n01.cac.psu.edu>, ericb@pobox.com (Eric
> Bennett) wrote:
> 
> | In article <28OCT199613435699@vax2.concordia.ca>
> | spec@vax2.concordia.ca (Mitchell Spector) writes:
> | 
> | > By the same token, it bugs me when PC users
> | > claim the 8088 PC running at 4.77 MHz, was 4 times faster than a 1.024 MHz
> | > 6502 Apple II+. :P (It's not!)
> | 
> | Of course not.  A 4.77 MHz 8088 is exactly (within significant figure
> | limits) 4.66 times faster than a 1.024 MHz 6502.
> 
> Yes... and for many things it was slower than the 6502. The 6502 was
> almost RISC in some ways... most instructions were single cycle

The fastest 6502 instructions take two clock cyles (this includes all
one-byte inherent mode instructions, such as NOP).  The slowest
instructions are seven cycles, e.g. LDA ($00,X).  The average for
"typical" code is about 3 cycles per instruction.

> - while there were some that were 30+? on the 8088... the 8088 had 16 bits
> internally, but only 8 bit bus... etc....

The 8088 was a partially crippled 8086.  The 8086 has a 16-bit data bus.

-- 
David Empson
dempson@actrix.gen.nz
Snail Mail: P.O. Box 27-103, Wellington, New Zealand