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Re: Installing GS RAM card in slots 1-7



"Charlie" <charlieDOTd@verEYEzon.net> wrote in message 
news:ht9tbo$ek8$1@news.eternal-september.org...
>
> "Michael J. Mahon" <mjmahon@aol.com> wrote in message 
> Fs-dnSEbycNoqWXWnZ2dnUVZ_vGdnZ2d@giganews.com">news:Fs-dnSEbycNoqWXWnZ2dnUVZ_vGdnZ2d@giganews.com...
>> rich12345 wrote:
>>> On May 22, 12:28 pm, "Charlie" <charlieD...@verEYEzon.net> 
>>> wrote:
>>>> I'm having trouble getting my mind wrapped around this 
>>>> statement.
>>>> Could you clarify it?  Specifically why is it necessary to 
>>>> access
>>>> both the AUX memory and main memory in the same cycle?
>>>
>>> AUX RAM and MAIN RAM need to be accessed in the same cycle
>>> for 80 column text and DHGR graphics.
>>>
>>> 1/2 of the video data is in MAIN, the other 1/2 is in AUX.
>>>
>>> Same cycle:  It takes 2X the time to display 80 columns compared
>>> to 40 columns.  It takes 2X the time to display DHGR compared to
>>> HGR....
>>
>> Actually, it takes 2x the number of *bits*, in exactly the same 
>> time
>> (1 cycle), so the need to access both main and AUX memory 
>> concurrently.
>>
>> Only one address bus is needed, but two data busses are required.
>>> If you access AUX at a later cycle, then you add to the time to
>>> update/refresh the video output.
>>>
>>>
>>> (maybe?)
>>
>> Very close.  ;-)
>
> My reason for asking is that I've been trying (without much 
> success) to get DHR working on the Carte Blanche card.  If it is 
> impossible I'll feel really good when I achieve it :-)
> Anyway, because of my lack of success, I've been trying to learn 
> more about how DHR works. That's why I am concerned about your 
> statement.  If all the DHR video data doesn't appear on the 
> peripheral slot bus I'm in deep trouble.
>
> Not being a hardware guy I figured that if data from the AUX 
> memory and main memory were placed on the peripheral bus 
> sequentially but interleaved then the it must have been accessed 
> that way (not concurrently).
> The CB card does *seem* to pick 80 column data off the peripheral 
> bus so I figured it could do DHR as well.  Am I wrong?

To maybe answer my own question:  I suppose the CB card is picking 
up the writes that a program is making to the video memory and using 
that to generate the VGA output.  If that is the case then I needn't 
be concerned with the concurrent accesses to AUX memory and main 
memory.

Charlie