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Re: How fast is a IIgs?



David Empson (dempson@atlantis.actrix.gen.nz) wrote:
: In article <3ut7ag$cbm@sun.lclark.edu>,
: Alfred Barter <barter@sun.lclark.edu> wrote:
: > What is the clock speed of an Apple IIGs?

: Variable.  The maximum rate, achievable when accessing ROM, is 2.8
: MHz.  "Fast" RAM is accessed at about 2.5 MHz on average (2.8 MHz with
: regular refresh cycles).  "Slow" RAM and I/O is accessed at 1.023 MHz,
: the same speed as an Apple ][, ][+, IIe or IIc.

: > I opened the sucker up and saw a crystal rated at about 3.6 MHz.

: Wrong crystal.  That is the crystal that controls the speed of the
: serial port (3.6864 MHz, divided by various amounts, produces 57600
: and lower baud rates).

: The main crystal in the IIgs is under the power supply.  It is rated
: at 28.63636 MHz.  This is divided down to produce the internal clock
: speeds such as 14.31818 MHz, 7.15909 MHz, etc. which are used in the
: video circuitry.

: > If I ripped that puppy out and put in say, oh...a 6.54 MHz crystal
: > would that speed up my IIgs?

: No.  If you tried to change the main crystal in the IIgs, the entire
: machine would stop working.  Nearly every part of the machine is
: timing critical.  The main component is video generation, which is all
: based on the 14.31818 MHz crystal speed.  Everything on the "slow"
: side of the machine is tightly synchronized to video generation, with
: half of each 1 MHz cycle used for video generation and the other half
: for CPU accesses to slow memory.

: The "fast" side of the machine is less speed critical, but the chips
: that interface between the two sides of the machine (particularly the
: "Fast Processor Interface") are designed around the crystal speed.
: Synchronization would be completely thrown out if the speed was changed.

: This is ignoring any issues such as component speeds - they may
: already ben near their limits.

: So, in summary, you cannot increase the speed of the machine by
: changing the crystal speed.

: The only way that the IIgs can be accelerated is by using a technique
: similar to that used by the ZIP GS or TransWarp GS: cache memory and a
: cache controller is added to the CPU, which runs at much higher speeds
: (7 MHz to 16 MHz, depending on the accelerator).  When accessing
: non-cached locations, the accelerator slows down and synchronizes with
: the motherboard.
: -- 
: David Empson
: dempson@actrix.gen.nz
: Snail mail: P.O. Box 27-103, Wellington, New Zealand