Re: Apple II suicide--a sermon...

[bazyar@netcom.com (Jawaid Bazyar)]

jd-wong@uxa.cso.uiuc.edu (Jim Wong) writes:

>jmk3@crux4.cit.cornell.edu (Jay Krell) writes:
>>>>There is no reason a compatible 32 bit 6502 compatible chip
>>>>couldn't have been built.
>>As someone unsuredly replied, the Acorn RISC Machine (ARM)
>>used in the Newton and some British computers is a 32-bit
>>cpu derived (loaded word) from the 6502. One of its key
>>characteristics is apparently code size/density. All PowerPC 
>>instructions, for example, are 4 bytes, so code can be a bit large.
>>I don't know the ARM instruction set though, though I did a book on
>>it...

>I'm intrigued.  I had no idea that the ARM chip was derived from the
>6502.  Is it binary compatible?  Could you build a 32-bit Apple II around it?

  At this time, the ARM 600 has a pretty standard RISC instruction
set - all instructions are 32 bits wide.

>If I remember correctly, there were some 6502 ISA that would make
>calling any implementation of it RISC a bit of a stretch.

  The ARM is only 6502-ish in their choice of opcode names.
The two processors have nothing in common (at least at
this point - there were previous ARM RISC chips which
I don't have experience with that may be more 6502ish).

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