Re: ZIP Chip Heartbreak

[toddpw@lust.ugcs.caltech.edu (Todd P. Whitesel)]

gtolar@blkbox.com (Glynne Tolar) writes:

>Now I don't have the 6502 pinout in front of me but I seem to remember a 
>DMA signal line to the CPU.  Otherwise how would the CPU know to stop 
>when a DMA cycle is occourring?

The 6502 has no DMA line. The Apple II +/e/c CPU support circuitry does.
When you use DMA, it pauses the 6502 in the dynamic phase of its input
clock, and isolates it from the rest of the bus so the card doing DMA can
take over.

This is why you can't DMA at a full 1 Mhz except on the IIgs, because 65xxx's
(except the "fully static" microcontroller parts) use DRAM-like memory to
hold the processor state during the dynamic phase of the clock (this is when
the "phase 1" signal is high on the timing diagrams). The IIgs holds its CPU
in the static phase ("phase 0") during DMA, so you can DMA at full speed on
the IIgs without worrying.

Todd Whitesel
toddpw @ ugcs.caltech.edu