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Re: Senior Prom logic

> and the schematic is here:
>
> http://picasaweb.google.com/regenerator6551/SeniorProm3#5421280293233...
>
> Good Luck,
>
> -Dutch

Thanks Dutch.  Your schematic pointed out an error in my design.  I
had thought that it was ok to insert pin 26 (A13) directly into the
Apple motherboard. It turns out there there is power to that pad and
the Apple won't boot if you're trying to drive that pad high or low to
enable/disable the Sr Prom banks of memory.  Now I understand why the
Sr. Prom guys shifted the EPROM sockets the way they did.  My Sr. Prom
is up and running now - woo!

I also believe I have figured out the original logic used with the
74LS00 which does the switching and debouncing using only three NAND
gates.  My hat is off to the Sr. Prom engineers for implementing such
an elegant minimalist logic solution. The schematic is here:
http://www.neilsonhart.com/seniorprom/SeniorPromSchem.bmp

Eric