Re: Carte Blanche JTAG cable questions

["Charlie" <charlieDOTd@verEYEzon.net>]

>-----------
"Steve" <srkh28@gmail.com> wrote in message 
7353a5ce-a6c8-479b-aa2d-846d360be6bb@t11g2000prh.googlegroups.com">news:7353a5ce-a6c8-479b-aa2d-846d360be6bb@t11g2000prh.googlegroups.com...
There is more info here if it helps;

http://www.applelogic.org/ProgrammingCBsFPGA.html

There are several area's on the site that talk about JTAG, but not
specifically. Ill add more info that covers these questions here.

steve

On Oct 7, 5:33 pm, Alex Freed <alex_n...@mirrow.com> wrote:
> Steven Hirsch wrote:
>
> >> Do I connect to the Digilent cable to the SOFT or the HARD pins 
> >> or both?
>
> > Definitely not both. I believe it would be the HARD set, but 
> > don't take
> > my word for it! I'd much like Alex or Steve to explain the 
> > distinction
> > and uses of hard vs. soft JTAG.
>
> Correct. The "hard" JTAG is the real JTAG. The "soft" JTAG is used 
> by
> Altium Designer tools to talk to soft instruments inside the FPGA. 
> As we
> are not currently using AD, the "soft JTAG" pins are free for 
> other use.
> The default configuration uses two as 3.3V level serial port. NOT 
> to be
> connected to RS232 which is +/-12V.
>
>
>
> >> Also the CB schematic shows the CONNECT pin as VREF (whatever 
> >> that
> >> is). It also says "IF YOU ARE CONNECTING THIS INTERFACE TO USER 
> >> BOARD
> >> A OR USER BOARD B DO NOT CONNECT THE REF PIN. REFER TO THE 
> >> APPLELOGIC
> >> WEBSITE FOR DETAILS". Unfortunately, the Applelogic website 
> >> seems to
> >> be down. So before I fry my CB card can anyone give me a 
> >> heads-up on
> >> what to do?
>
> > That's definitely a Steve-or-Alex question...
>
> The JTAG connector on the CB was designed to be AD compatible. The
> CONNECT pin is used to let the rest of the system know that 
> something is
> plugged in. This is not needed using non-Altium tools but other 
> cables
> require a voltage reference. Note that Digilent cable says 
> something
> like "1.8 to 5V". It needs to know which voltage to use. The VREF 
> is
> used for that. So CB design was modified to rewire the unneeded 
> CONNECT
> as a voltage reference for the non-Altium JTAG cables.
>
> -Alex.
>------------------

Thanks Alex & Steve,

I followed your instructions and was able to send the VGA diagnostic 
to the Carte Blanche card without any trouble.  One question though, 
after assigning a new file Xilinx Impact 11.1 gives an option to 
flash SPI/BPI prom (YES/NO).  I chose NO but if I had chosen YES 
could I flash the memory this way instead of from the SD card?

Thanks again,

Charlie