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Re: DMA at 2.8 MHz?



In article <1so0i2INNsg@gap.caltech.edu> Todd P. Whitesel,
     toddpw@cco.caltech.edu writes:
> What Jim posted from the hardware reference were descriptions of what
> speed the 65816 could be running at while DMA is occurring. This is
> independent of the data transfer speed and only affects whether or not
> the CPU can do anything while DMA is going on in the system. Existing
> DMA drivers all seem to drop the CPU down to 1 mhz and wait for the
> transfer to finish, and there are some good reasons for doing it that
way.

     Yup, what Todd said is correct. After posting that chunk twice, I then
thought about it. If you look at any timing diagram involving DMA in the
GS Hardware Reference, you'll see that the 1 MHz bus speed limit is indeed
true. Silly me. :-)


Jim Murphy        Apple II System Software Engineer        murph@apple.com

"...never quite said what I wanted to say to you,                 The Cure
  never quite managed the words to explain to you..."             Untitled