Re: TurboRez - Released Yet?

[toddpw@cco.caltech.edu (Todd P. Whitesel)]

bazyar@teal.csn.org (Jawaid Bazyar) writes:

>  That's kinda wierd because there's nothing that prevents DMA at 2.8MHz,
>at least according to the Hardware Reference.

Not really. What the 2nd ed. says (and it's somewhat clearer I believe) is
that DMA devices themselves are always limited to 1 mhz slot bus cycle access
(i.e. the 2.8 mhz fast bus cycles aren't officialy exposed to cards in the
slots, which is annoying but does simplify the bus logic for compatibility's
sake, as usual). If the DMA cycle is going to fast RAM, then the CPU may be
running at 2.8 mhz while the DMA cycle is occurring and you won't get any
explosions. But Apple says that DMA to I/O and slow RAM -must- be done with
the CPU running at 1mhz. This avoids the need for complicated bus contention
logic between the 2.8 mhz slow-down circuit and the DMA inputs. Fast ram can
be arbitrated on a per-cycle basis and isn't much of a problem.

Todd Whitesel
toddpw @ cco.caltech.edu