[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: Update on Carte Blanche status.



Alex Freed wrote:
Michael J. Mahon wrote:

That sounds great, Steve.  It shouldn't be too hard to bit-bang it
at 50kbits/sec or so, assuming that the FPGA doesn't limit the speed.

No worries here - the FPGA doesn't mind 12 MHz clock :)


Alex mentioned configs of about 160K bytes, so that works out to about
1280kbits/50kbits or around 30 seconds of data transfer over JTAG,
plus a few seconds to read the config file from a hard disk--sounds
quite reasonable.  It should be quicker than booting a PC.  ;-)

I suggest you may want to start reading xapp058 available on the Xilinx'
web site - using a microcontroller to program FPGAs. In this case Apple can impersonate a microcontroller. Or you can start with some other implementation of this not quite trivial code that will need to be ported to Apple. Sounds like a fun project for somebody.

Thanks, Alex--I'll take a look.

-michael

NadaNet 3.0 for Apple II parallel computing!
Home page:  http://home.comcast.net/~mjmahon/

"The wastebasket is our most important design
tool--and it's seriously underused."