Re: Western design chip

[bazyar@teal.csn.org (Jawaid Bazyar)]

tgeer@pro-gumbo.cts.com (System Administrator) writes:

>In <fmlin.3i11@terapin.com> fmlin@terapin.com (Frank M. Lin) writes:

>>If you're lucky, you'll be able to go 15mhz like me.  :)  But I had to get 15ns
>>SRAMs, and increase my voltage to 5.6v to be here.  I'm at about 4x the speed
>>of a stock gs.

>Pardon my nitpicking but if you're running at 15Mhz then:

>     15Mhz / 2.8Mhz = 5.36 times the *rated* speed on a stock gs
>or
>     15Mhz / 2.6Mhz = 5.77 times the *effective* speed of a stock gs

>a good bit more than 4 times the speed.

  Because of the ways cache-based accelerators work, about 4X is correct.
The CPU only runs at the full speed when data needed from memory is in
the cache.  Otherwise, the IIgs slows down to 2.8MHz (or 1MHz, depending
on the location), gets the data, and puts it in the cache.  Further
accesses will be at high speed, _unless_ a particular bit of data had
to be removed to make room for other data.

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