Re: Z80 its refresh pin

[srkh28@gmail.com]

Hi,

>
> Is the CPU actually executing? Trigger on falling edge of _M1 and
> verify that you see the correct waveform (_M1 and _RFSH should be out
> of phase within the instruction fetch portion of the instruction
> cycle).

I havent triggered off M1 yet, Im just plugging into to this now. Ive
been working on the vital signs, and with the softcard design, the
refresh pin is part of the combinational logic that enables external
address and data drivers during phase 0, so ill have to connect in
before these to see if I can see it cycling trying to load at add
0x00. The Z80 is a new processor to me, so its a bit of a learning
curve. Do you know exactly what the Z80 does when it comes out of
reset?
>
> Is _BUSRQ externally asserted? That will take the Z80 off-bus
> permanently and float _RFSH.

Yep. BUSRQ is firmly high - i drive it from a totempole output,  (in
my last test, I connected it to 5V0 direct, but still refresh sets low
and stays there)  I have also checked to make sure WAIT is set high
and HALT responds with a high,which they do.
>
> And for the obvious one... Are you sure that the Z80 is actually
> asserting _RFSH and it's not something else on your PCB... isolate
> that pin of the chip, put a pullup on it, and see what it's doing.

Ive removed all connections to refresh, then pulled refresh high via a
1k resistor to 5V0 - the Z80 still pulled this thing low (down to .9v
from 5V0).
Crazy. Im sure its going to be something simple. My next step is to
replace the clock with something else. Its the only thing that seems
to govern refresh. My current clock is not exactly a 50/50 duty cycle.

steve