Re: Apple 2 benchmark?

[Alex Freed <alex_news@mirrow.com>]

RedskullDC wrote:
> Made any headway with this?

I've built a rather simple configuration that runs at
28 MHz (on the Altium NB). Didn't have much time to
play with it.  I need to change the project to all
portable HDL because it's not obvious how to use
proper timing constraints with Altium tools and I
don't have much need to learn. Once I use vanilla
Xilinx environment it is likely to run at 84 MHz.

> Incidentally, just tried out your FPGA_DE1 port.

I'll do a port of the enhanced //e to DE1 soon. The
problem is there is no (free) 65C02 core bug free
enough to run some 65C02 specific Apple programs.

-Alex.