Re: NadaNet for the //c - just an idea

[mdj <mdj.mdj@gmail.com>]

On Aug 26, 8:46 am, "Michael J. Mahon" <mjma...@aol.com> wrote:
> magnusfalkirk wrote:
> > On Aug 25, 1:15 pm, "Michael J. Mahon" <mjma...@aol.com> wrote:
> >> It doesn't help that my IIc and IIc+ schematics are all but unreadable..
>
> >> -michael
>
> >> AppleCrate II: An Apple II "blade server"!
> >> Home page:  http://members.aol.com/MJMahon/
>
> >> "The wastebasket is our most important design
> >> tool--and it's seriously underused."
>
> > Michael,
>
> > you should have that copy of the //c schematic that I copied from
> > the //c Technical reference. If you can't find them I can always e-
> > mail you a second set.
>
> Yes, I checked that and another set that Bill Garber emailed,
> but I note that neither shows the PB circuitry.  So I'll have
> to go with the "abstracted" PB schematic in the manual.

The main concern would be the propagation delay of the opto's - there
doesn't appear to be any RF suppression on the input side (he says,
looking at a IIc motherboard)

> The good news is that it now appears that WRPROT will do the
> job as long as the state machine is left in the "shift in
> WRPROT" mode.

It's worked fine for me in the past, but then, I wasn't attempting to
use anywhere near the bandwidth nadanet requires (ie. flat out!)

> FWIW, while I was perusing schematics, I noticed that XDIR
> (pin 4 on the 9-pin game port) is apparently a straight
> logic level input, and would be much easier than a PB!

For that one though (I think, as I left my IIc manual in melbourne
this trip) you'd have to put the machine into mouse mode (whatever pin
that is) to disable the 556 timer that normally triggers the PDL
inputs

Matt