On Tue, 1 Apr 2008 01:30:20 -0700, Alex Freed wrote
(in article <vtmdnWVrgcCAb2zanZ2dnUVZ_gadnZ2d@comcast.com>):
It would appear that a very simple circuit could be made for an
experiment. The parallel printer card should be able to latch 8 bits
(unless it only uses 7, I don't remember). So a simple R-2R network
or even 1-2-4-8 K resistors can make a dual 16 level DAC that will
have an advantage of being set at once. Add 2 caps and a lot of software...
To get good A/D from this use 1% resistors, which are practically the norm
these days, and buffer with a 74HC part (unless that is what the output
driver is) so that you have a good voltage source. TTL parts are not speced
for this. The CMOS parts work great. I used them plus discrete R/2R for the
video output on the ImageWorks cards.
A bit off-topic, but close enough. I have heard of an interesting
technique of debugging uC systems in the early days when logic analyzers
were not easily available. 2 R-2R DACs, 8 bits each on the low and high
bytes of the 16 bit address bus connected to a X-Y scope allegedly gave
a good idea of what the program was doing. Anybody ever heard this?
Yes. You can see a definite pattern when your program is running and another
one for stuck in a small loop or when waiting for user input, etc. Some of
the logic analyzers had this as a "feature" and there was a name for it.
Vector mode?