Re: Apple II DMA for free.

["bieling@terra.es" <bieling@terra.es>]

On Mar 25, 3:45 am, "Bryan Parkoff" <nos...@nospam.com> wrote:
>
>     I am not sure I understand your question.  It looks like what you want
> to reduce wasted 6502 CPU cycles by removing un-needed trash cycles per 6502
> instruction, but it will refresh RAM incorrectly.  You can go to use DMA
> without depending on 6502 CPU.  To do this.  Set high on Phase 1 signal to
> control RAM directly by using DMA.  You may be able to trace how data is
> retreived or stored from / into RAM each ONE cycle out of 1 MHz.  It might
> screw video processor because it uses DMA at phase 1 signal.
>     You can try to disable 6502 CPU and use your own secondary CPU according
> to your design to do DMA at phase 0 siginal while video processor runs at
> phase 1 signal.  It might give you the big difference.
>
> Bryan Parkoff

Bryan,

The idea is that
-You can steal *regular 6502 memory cycles* during phase 0 therefore,
not phase 1.
-As there's no need to halt the 6502 during these DMA cycles, the 6502
will continue to run at 100% full speed.
-That's, I think, a magic, free, 100% transparent, unknown DMA channel
that exists but nobody never ever has used, afaik.

You could be writing to the disk II or saving to a cassete, and at the
same time transferring tens of KBytes of data in/out of the Apple II
transparently and it won't affect disk/cassete write operation at all,
to name a very time-critical operation. That's because it regains for
use these unneded, wasted, innecesary, interleaved in-between 6502's
opcode execution memory access cycles that are happening all the time.

No, it doesn't affect RAM refresh, because RAM refresh happens during
phase 1.
This channel is available during phase 0 and then only for the cycles
that the FREE/BUSY signal marks as free (FREE/BUSY==1).

Jorge.