Re: Print to SHR

["Michael J. Mahon" <mjmahon@aol.com>]

Payton Byrd wrote:
> "Michael J. Mahon" <mjmahon@aol.com> wrote in message ap-dnce4UZBwU3DYnZ2dnUVZ_sCinZ2d@comcast.com">news:ap-dnce4UZBwU3DYnZ2dnUVZ_sCinZ2d@comcast.com...
>
> > William Garber wrote:
> > While Moore's "Law" has pretty much petered out for improvements
> > of single-thread processor performance
>
>
> Evidently you haven't seen a Core 2 Duo in action.  It's about 40 to 180% faster than the Netburst architecture at the same clock speed per thread.

*At the same clock speed*--but clock speeds are no longer increasing
exponentially--closer to logarithmically.  ;-)

The improvement you quote at the same clock speed is a measure of the
improved efficiency of the microarchitecture, which the netburst
microarchitecture had thrown away to gain marketing megahertz.

(BTW, the *big* numbers, like 180% are a case of either very
specialized loopy code or cases where the working set of the code
now fits in the 4MB cache, when it didn't before.  The sustained
throughput improvements due to microarchitecture are more in the
30%-40% range.)

Many other microarchitectures, AMD and PowerPC among them, had achieved
the Core 2 efficiency several years ago--this is just a case of Intel
finally getting the word.

For this to be a part of a Moore's "Law"-like advance, there must be
a succession of "encores" to this microarchitecture improvement that
continue to deliver more performance at the (slowly increasing) clock
speed.  Don't count on that--particularly from Intel.

> > the hard disk guys continue
> > to out-run Moore with density and speed improvements.
>
>
> Moore's Law just says that every 24 months the size of transisters will be halved.  This has held true and continues to hold true.  Performance does not scale directly with feature size because the interconnects between the features is already a minimal portion of the time it takes the electrons to move around the CPU.  Also, Intel's 45nm process uses some new materials that they say will be good down to 15nm.  Below that you're into nanotechnology and the carbon nanotube industry is already churning out usable chips for tech samples and there are even quantum computing systems starting to come online through carbon nanotube technology.  No, Moore's law isn't slowing down at all, it's actually accelerating considering the recent advances in nanotechnology.

But from the mid-1980s to 2000, that increase in density was directly
translated into performance doubling, about half of it directly from
clock speed improvement (smaller transistors) and half of it from
increased single-thread parallelism (more transistors).

Now, we've reached the practical limit for rapid improvements in
either one of these.  Power limitations prevent large processor chips
from significantly increasing their clock speeds, and we've about
emptied the well of improvements in single-thread parallelism,
so more transistors doesn't deliver much more sequential performance.

The only way to exploit more transistors now is with larger caches
(diminishing returns) and more cores (plays to our weakness in
designing, programming, debugging, and scaling parallel programs).

Silicon chips are *already* nanotechnology, and quantum computing
is still a lab curiosity--and will remain so for at least another
decade.  Look at how long it takes a lab technology to show up in
shippable products.

I'm not saying that it isn't possible to build better things--of
course it is--but the time and capital to do it is *very* large,
and it isn't at all clear how that investment is going to be
financed ten years from now by selling what have *already* become
commodity chips.

The industry model is currently unstable.

> > The silicon run was good while it lasted, but we're having to
> > work hard for the last order of magnitude these days.  As the
> > rate of improvement slows and the required capital investment
> > soars, the whole "wait 'til next year if you can't afford it"
> > mentality is due for a sea change.
>
>
> Sorry, I just don't see this.  The reality of the market is much different.  AMD/IBM has managed to accelerate their product process generations because of materials advances and will have 45nm products in production on store shelves less than 2 years after their introduction of 65nm products.

I agree that the silicon technologists are finding ways to keep
the density increasing, but the price for each doubling of density
is also doubling, and we don't have the knowledge to translate
those higher densities into higher throughput on things that
customers care about enough to buy them.  That's the problem.

Remember when it was exciting to see the succession of new chip
generations and the new applications that they enabled?  Notice
how long it's been since that was the case?

> > If it weren't for massive consolidation and the cost reductions
> > that come from economies of scale, things would be even dryer in
> > silicon valley.
>
>
> This is actually a function of Moore's Law.  This is also what killed Commodore as they didn't invest into MOS Technologies as they should have then they got left behind.  At the end they were depending on a 12 year old computer with a 20 year old CPU that was still manufactured as if it were 1982 all over again.

Exactly.  Moore's "Law" is a virtuous economic cycle, and if you
don't keep the pump primed, it stops pumping.  The pump is running
a lot slower these days, and there are lots of bubbles inside...

If it doesn't get a lot better soon, it will get worse.

-michael

NadaNet networking for Apple II computers!
Home page:  http://members.aol.com/MJMahon/

"The wastebasket is our most important design
tool--and it's seriously underused."