Re: Request a discrete refresh circuit schematic

[et472@FreeNet.Carleton.CA (Michael Black)]

"PZ" (skierpaul@yahoo.com) writes:
> 72 pin simms would be more difficult since we only have an 8 bit data
> bus and 72 pin simms expect a minimum dbus of 16 bits.  I'm not saying
> you can't do it, there's a couple ways to implement 72 pin simms on an
> 8 bit bus, but it'll require some extra logic over the 30pin simms.
> 
> - Paul
> 
And you just ignore the unwanted 8 bits, it doesn't matter that you waste
them, there are all those SIMMs that nobody much wants because they are
too small for other uses.

  Michael

> Ed Eastman wrote:
>> Since there is no A2 hardware forum, I'll post it here...  (Sorry about
>> posting to the emulators group.)
>>
>> I need a circuit to refresh some stand alone ram for a RAM expansion
>> circuit I am designing.  (12M Ram on the IIgs)  I understand the basic
>> theory but I need an actual circuit with real RAM chips to help me
>> visualize the process. I've looked on the internet but the refresh
>> circuit is always glossed over and people are using a memory manger or
>> some such chip that I don't have access to.
>>
>> Would someone please send me a discrete schematic of a refresh circuit
>> on say, a 4 meg bank of RAM?  Or I'd be just as happy with a point to
>> some resources readily available via internet or book reference.
>>
>> I forgot to mention I'd like to use some old 8bit SIMMs I have laying
>> around.  Of course the circuit would be just as easy on a 72 pin simm.
>> 
>> Thanxk,
>> Ed
>> eeastmanNO@SPAMgmail.com
>