All hail to the right honourable lords and ladies of 6502 hackery! ;-)Adam Vardy's article "Extra Instructions Of The 65XX Series CPU" covers this topic very well down to the ugliest details, but is unclear in two points:
SKB *** SKB stands for skip next byte. Opcodes: 80, 82, C2, E2, 04, 14, 34, 44, 54, 64, 74, D4, F4. Takes 2, 3, or 4 cycles to execute.
Is it documented anywhere which of these opcodes have which cycle counts?
AXA *** This opcode stores the result of A AND X AND the high byte of the target address of the operand +1 in memory. Supported modes: AXA abcd,Y ;9F cd ab ;No. Cycles= 5 AXA (ab),Y ;93 ab ; 6 Example: AXA $7133,Y ;9F 33 71 Equivalent instructions: STX $02 PHA AND $02 AND #$72 STA $7133,Y PLA LDX $02
This is clear enough for the abs-y (9F) case, but what is "the high byte of the target address of the operand" in the indirect-y case (93)?
Any elucidations are highly appreciated! Including telling me where to look and/or whom to ask.
(Please note that this article has been cross-posted to three groups). -- Linards Ticmanis