Re: Apple II VGA video card and the IIgs

["David Wilson" <mcs6502@gmail.com>]

Jorge Chamorro Bieling wrote:
> David Wilson <mcs6502@gmail.com> wrote:
> > Slot 3 in the ROM01 IIgs and Slots 1-6 in the ROM03 has M2B0 on pin 35
> > and both have /M2SEL on pin 39 in slots 1-6. These allow a card to
> > detect reads/writes from/to the Mega II RAM and which bank is being
> > accessed.
>
> Can you tell me more about this ?
> What exactly is the meaning of these M2B0 and /M2SEL signals ?
> How does this help to know the bank that is being accessed ?

>From pages 175 & 196 of the Apple IIgs Hardware Reference (Second
Edtion):

Pin 35 - M2B0 - Mega II bank 0 signal. 256K Apple IIgs: slot 3 only;
1MB Apple IIgs: slots 1-6. This signal is the bank address bit and is
valid only during Mega II accesses.
Pin 39 - /M2SEL - The Mega II select signal: This signal goes low
whenever the Mega II is addressing a location within the 128K of Mega
II RAM.

The /M2SEL signal (which replaces the uSYNC signal found at pin 39 in
previous Apple II models), indicates when a 1.024 MHz, synchronized
memory cycle is taking place and, therefore, when the value on the
address bus will remain valid during the current phi0 cycle. This means
that cards that use the Apple II technique of "phantom slotting" to put
multiple I/O devices on one card must use /MSEL to qualify their
address decoding.

Thus I think this is a summary (although the M2B0 signal should either
be inverted or called M2B1 to have the correct name):

If /M2SEL == 0 && M2B0 == 0 then bank $E0 is being accessed
If /M2SEL == 0 && M2B0 == 1 then bank $E1 is being accessed.