Re: Apple II VGA Video Generator Card Project

[bieling@terra.es (Jorge Chamorro Bieling)]

Alex Freed <alexf@mirrow.com> wrote:

> 
> If an FPGA is used, the internal BRAM (block RAM) is organized as dual
> port memory anyway, so it's a no-brainer.

What's the size of these memories ?

> If the card is built with regular RAM (say the surplus cache chip from
> an old 486 motherboard) and discrete logic and/or CPLDs then transparent
> video RAM access is still quite simple. Run the board clock at say 8 
> times the Apple clock and read the video RAM 4 times during the 500 nS
> of the Apple 2 video cycle. As you said the dual-ported RAM is quite 
> expensive. Old cache RAM is virtually free.

Yes. In fact the memory is also yours during every 6502 read cycle. And
most of the time during write cycles too, let's say 400nS, because 100
nS (the last 100nS of the 6502 write cycle) is plenty of time for a
write at today's memories' speeds (5-15nS).

But, what makes me feel uncomfortable is:

1.- Shared RAM access is constrained to certain time solts, and
therefore, both parts of the system must run synchronously which means
more design effort and multiplexing circuitry.

You see it as: "Standard memory is cheaper, and there's a way to go with
it". And then you're right. still... hmmm I see the dual-ported ram
design as bright and clean, and the other as a pain to suffer because
the dual port ram happens to be so expensive.

2.- The standard memory approach makes the design phase0-dependant, and
this means it won't neccesarily work in the Apple IIc+. At least without
additional care == design effort. And then only if it's worth it. And
what would happen if the Apple IIc+ was overclocked ?

Regards,
-- 
Jorge Chamorro Bieling