Michael J. Mahon wrote:
By a happy coincidence, the period of the PWM pulses created by DAC522 is 46 Apple cycles, and your sampling scheme should reproduce its output perfectly!
Well, RT.SYNTH is almost inaudible with it, so there must be *some* kind of problem...
Wouldn't there be a high dependency of the output quality on just *where* in the 46-cycle DAC522 cycle each new 23-cycle emulator sample starts?
-- Linards Ticmanis