6502 / 65C02's Invalid Address Bus

[BryanParkoff@yahoo.com (Bryan Parkoff)]

I find an interesting issue that invalid address always occur when
page boundary is crossed.  Low Byte of Address Bus is always correct,
but High Byte of Address Bus is always invalid until extra cycle to
correct High Byte of Address Bus.
    Understanding Apple //e manual claims that 65C02 has fixed invalid
address on fourth cycle, but 65816 is not fixed.  I have not tested
Apple //e and Apple //c yet.

For example.

0FFE: LDX #$FF
1000: LDA $C051,X
1003: RTS

6502
X = FF
Cycle 1
Address Bus: 1000
Data Bus: BD
Cycle 2
Address Bus: 1001
Data Bus: 51
Cycle 3
Address Bus: 1002
Data Bus: C0
Cycle 4
Address Bus: C050
Data Bus: IGNORE
Cycle 5
Address Bus: C150
Data Bus: DATA

    65C02 should always place 1002 instead of C050 on fourth cycle
before it places C150 on fifth cycle.  I give three example
instructions from $0FFE through $1003 for you to test on Apple II+,
Apple //e, and Apple IIgs, but I have not tested Apple //e yet.
    You run at *FFEG.  See what happen...GR (Low Graphic Resolution)
is turned on at $C050 on fourth cycle since it is always in TEXT
screen.  Please let me know what you find this out.  What do you
think?

--
Bryan Parkoff