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CFFA and my Apple ][+ equals: timing touble
- Subject: CFFA and my Apple ][+ equals: timing touble
- From: Rich <rich@dreher.NOSPAM.net>
- Date: Fri, 21 May 2004 01:26:39 -0500
- Newsgroups: comp.sys.apple2
- Organization: VISI.com
- User-agent: MicroPlanet-Gravity/2.60.2060
- Xref: controlnews3.google.com comp.sys.apple2:672
Hi All,
As I said before, I have started working on a new firmware.
The changes all worked great in my //e platinum, but crashed
in my ][+. Remembering I had problems with my ][+ during the
original development, I decided to take another looks at the
bus timing. I see a major problem!
Their seems to be a difference between the //e platinum and ][+ when it
comes to the relationship of /DEVSEL and the 7M clk signal.
Basically, the /DEVSEL is shifted in relation to the 7M, and this
is screwing up the timing when plugged into my apple ][+.
I use the 7M clock to create a delay, so the /IORD and other signals
have the correct timing.
If my ][+ can be assumed to represent a typical ][+, then there
is little change others will get it working either. Or, if others do
work, it is very marginal at best.
My free Altera dev system license ran out, so I am now downloading
the lastest version, and a new license. I will let you all know I come
up with a new version. I don't think it is something that will effect
//e or later users. In fact I fear, I may have to have one CPLD for
the ][+ and one for the //e enhanced or greater.
I will update this thread and my website when I know more.
Thanks,
Rich
http://dreher.net/CFforAppleII/