Re: Accelerator / VGA Graphics card

["Charlie" <charlied@NOSPAMbboard.com>]

"Sheldon Simms" <sheldonsimms@yahoo.com> wrote in message
pan.2003.10.24.13.26.01.77231@yahoo.com">news:pan.2003.10.24.13.26.01.77231@yahoo.com...
> On Fri, 24 Oct 2003 00:06:54 -0400, Charlie wrote:

> >> > Would all Apple II memory be maintained on both the card and the
> >> > Apple?
> >>
> >> The memory on the card would be the "real" memory. The main reason for
> >> that is speed. There's no point in crippling the card's CPU by
> >> requiring it to spend 90% of it's time waiting for the "old" Apple II
> >> memory.
> >
> > Makes sense, but wouldn't you still have to transfer the data from the
> > card memory to the Apple memory and vice-versa.   Although, on second
> > thought this would probably only have to be done during I/O.
>
> There's actually no need to use the "Apple" memory at all,
> although DMA could be a problem there.

Yeah, the more I thought about it the less I could see a use for the Apple RAM.
Then you brought up DMA, which I had completely forgotten about.  Could the
card just "direct" the DMA to the RAM on the card by watching pin 22 (DMA) and
having the emulator "spin its wheels" until the DMA is completed?  Keep in mind
that I have no idea what I'm talking about <grin>.

> >> > How do you handle Apple software that relies on precise timing such
> >> > as disk I/O?
> >>
> >> The same way that traditional Apple II accelerators do - by slowing
> >> down for a while after accessing timing-sensitive devices. How this
> >> slowing down would be accomplished is yet to be determined. It may be
> >> possible to do it completely in software, or it may require some
> >> hardware assistance.
> >
> > I'm thinking that doing it by just slowing down might be tricky.  A
> > traditional Apple II accelerator doesn't have an emulator to deal with
> > so slowing it down works, but an emulator would have to maintain the
> > exact ratio of time needed per instruction as a real 65816. Otherwise
> > you couldn't guarantee that a particular code loop would run at the
> > correct speed when the processor was slowed down to 1MHz.
>
> It isn't required that the card's processor be slowed to 1Mhz. It
> would just have to drive the Apple II's bus at the correct speed.
> It would probably be necessary to emulate every cycle of the 65816
> execution. In other words, this "slowing down" might actually be
> nothing more than the emulation code executing a 65816 instruction
> and then waiting around for each tick of the 1Mhz clock and writing
> the appropriate bits to the Apple II's bus. This could be done
> mostly in software, but it might require the 1Mhz clock to trigger
> interrupts on the card.

That makes sense and I like the idea of the 1MHz clock generating an interrupt
on the card.  Wouldn't this free up the emulator to do other things (graphics)
in between interrupts?  And even if there was nothing to do, from the little
I've read about the Efficeon chip it drastically reduces its power consumption
when it idles.
Anyway, it seems like you've put a lot of thought into this project.  You are
slowly making me believe that it is doable (although the cost still seems to be
an unknown).  Assuming that a working design is created, is it your intention
to actually produce complete cards or just plans on how to do it?  Maybe,
something in between?

Charlie