Re: IIc+ info needed

[mjmahon@aol.com (Michael J. Mahon)]

Wayne Stewart wrote:

>Michael J. Mahon wrote:
>> David Wilson wrote:
>
>>>The pinout on the //c+ RAM port is the same as that for the //c
>>>(I suspect the reason the Apple card does not work in the //c+
>>>is that the ASIC cannot handle an accellerated system).
>> 
>> 
>> This would be surprising, since the IIc+ bus speeds are
>> the same as other Apple II's.  The Zip Chip accelerator
>> does nothing to alter the bus speeds or expansion
>> characteristics.
>
>Apples website says
>
>The Apple IIc Plus manual, page 110, states, ( The Apple IIc Memory
>Expansion Card is not designed to be used with the Apple IIc Plus. Ask
>your authorized Apple dealer to recommend a compatible card.)
>
>The design of the Apple IIc Plus renders the Apple Memory Expansion Card
>unstable, because of timing problems associated with the gate array.
>
>Use of the Apple IIc Memory Expansion Card in an Apple IIc+ is not
>supported by Apple.

Very interesting!

That's the first thing I've heard about the IIc+ that indicates the
implementation is not simply a discrete version of the Zip Chip.

I'm still wondering if anyone ever tried to "overclock" their IIc+,
but this suggests that the timing margins may not allow much...
I suppose we can count on Apple using the slowest (cheapest)
implementation of the gate array that still works.  ;-)

-michael

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