Re: Microsoft Z-80 Card on Apple II+

[mjmahon@aol.com (Michael J. Mahon)]

In article <b6glpf$kuh$1@merope.saaf.se>, pausch@saaf.se (Paul Schlyter)
writes:

>In article <20030402140413.09313.00000074@mb-ch.aol.com>,
>Michael J. Mahon <mjmahon@aol.com> wrote:
> 
>> The SoftCard ran all Z80-generated addresses through an adder to
>> add $10 to the high-order byte.  This is how the distinctive Z80
>> "view" of the Apple II address space was generated.
> 
>It wasn't a simple addition of $1000 to all Z80 adresses: the Z80
>address range 0B000H to 0DFFFH vas translated to 6502 addresses $D000
>to $FFFF (i.e. an addition of $2000 to the Z80 addresses in this
>range), while Z80 addresses 0E000H to 0EFFFH was translated to the
>Apple II's I/O address range $C000 to $CFFF (i.e. a subtraction of
>$2000 from the Z80 addresses).  This little trick made the "hole" at
>$Cxxx in the Apple II RAM address space appear to go away, giving the
>Z80 a coninuous space of RAM memory from 0000H to 0DFFFH which
>included 12K of the Language Card RAM giving CP/M 56K of RAM instead
>of just 44K.  Such a memory layout is what CP/M expected: continuous
>RAM from 0000H up to some upper boundary.

Thanks for the detail, Paul.

I wasn't trying to give a complete account of the address translation
(not wanting to go look it up  ;-), but simply to point out why having
the Z80 address Apple II memory through an adder might strain the
address setup time margin.

Having the amount added or subtracted dependent on additional
decoding strengthens the point.

-michael

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