Re: Apple IIe TV output quality

[dempson@actrix.gen.nz (David Empson)]

Kevin <kevin@hackaday.com> wrote:

> On Saturday, December 29, 2012 1:41:36 PM UTC-6, Cyril Thibout wrote:
> > I must add that in 80 col mode what I mean by 'unreadable characters' is
> > that the last column for each character is missing. This problem doesn't
> > occur in 40 col mode
>  
> tv's usually SUCK due to input bandwidth, but the characters should not be
> missing any column on a monochrome screen and there may be something fishy
> with the 80 column card. First thing to do is visually inspect the card
> and look for any obvious defects (broken traces, loose pads, bubbling silk
> screen, burned components, growth etc)

In the IIe, the only function of the 80-column card is to provide extra
memory (which is used for every second column in 80-column mode, or
every second column of seven pixels in double hi-res graphics mode).

If the problem is showing up on every column of text then it is
affecting characters read from both main and auxiliary memory, therefore
the 80-column card is not the problem. It must be an issue on the
motherboard, somewhere in the video generator circuitry.

I'd expect to see a similar problem in double hi-res graphics mode, and
it might also be visible in lo-res graphics mode, since that uses 14 MHz
output via the shift register (text and single hi-res modes output video
at 7 MHz rather than 14 MHz).

It cannot be an issue with the video ROM (character generator), since
the correct data is being generated in 40-column mode.

The behaviour suggests that bit 5 of the output of the video ROM is
being lost in 80-column mode: bit 0 is the leftmost column (normally
blank), bits 1-5 are the character, and bit 6 is the rightmost column
(normally blank).

I'd be inclined to examine the area around the LS166 shift register
closely, particularly looking for shorts between pins, or a dry joint.
It could be an interaction between a clock pin and one of the data
inputs, or clock and an output. The relevant pins, courtesy of
"Understanding the Apple IIe":

Pin 13 is the video output signal, which also loops back to the serial
data input on pin 1 (used in lo-res graphics mode to repeat the
pattern).

The input data from the video ROM is on pins 14, 12, 11, 10, 5, 4, 3 and
2. Pin 4 is the one that has bit 5 of the output, which seems to be
having the problem.

Pin 15 is the LDPS timing signal, which goes low at the end of phase 1,
and also at the end of phase 0 if in double-res graphics modes.

Pin 6 is the VID7M signal, which carries a 7 MHz clock when operating in
7 MHz video modes, and is low when in 14 MHz video modes.

Pin 7 is the 14 MHz clock.

-- 
David Empson
dempson@actrix.gen.nz