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Re: 6502 test suite
On Wed, 12 Sep 2012, BLuRry wrote:
I was pointed to this 6502 processor test program:
http://forum.6502.org/viewtopic.php?f=2&t=2241
I've written a test harness to lash this up to Jace's CPU emulation and
also enable CPU trace and the memory spy module. So far things get
really weird around BRK, PHP and PLP combinations. For example the
infinite loop at 3e69 indicates the emulation did something wrong that
the program asserts should work differently. Any ideas on this one?
42 FB 48 01FB N.R....C 3e5f : LDA $0102,X
30 FB 48 01FB ..R....C 3e62 : CMP #$30
30 FB 48 01FB ..R...ZC 3e64 : BNE $3e64
30 FB 48 01FB ..R...ZC 3e66 : PLA
20 FB 48 01FC ..R....C 3e67 : CMP #$34
20 FB 48 01FC N.R..... 3e69 : BNE $3e69
Nothing precise (I don't have the time to check this line by line) but the
PLA / CMP #$34 sequence looks like checking the pushed status flag value
on entering the BRK handler:
- the unused bit should be set ($20)
- B should be set ($10)
- I should be set ($04)
Just the reminder that the unused bit is always set, and that BRK only
pushes the status flag with bit 'B' set - it is never actually set in the
register itself, IIRC. BRK being two bytes long is what you already know
judging by the disassembly.
Of course it could be something before that - you'd better check what was
really PLA-ed into the accumulator.