Re: Carte Blanche programming.. lets setup an online meeting

[rich12345 <aiiadict@gmail.com>]

On Mar 29, 3:46 am, Steven Hirsch <snhir...@gmail.com> wrote:
> On 03/28/2011 05:37 PM, Charlie wrote:
>
> (snip)
>
> > Anyway, if I can help you get started just ask.  Either email me or better
> > yet ask here because I'm sure others will join in.
>
> Thanks for the kind offer, Charlie.  I will try to screw up my courage to dive
> into this again.  I got so frustrated last time around that I put all the
> pieces and docs away, so it will take a bit to get everything out, organized
> and ready for more work.
>
> I still think there's a burning need for a raw beginners project that
> hand-holds the user all the way through - including basic negotiation of the
> Xilinx ISE dialogs.  Maybe I'm asking for too much, so I'll stop before I
> sound like I'm whining :-).

libraries for schematic design:

http://www.downloads.reactivemicro.com/Public/Electronics/Xilinx%20ISE%20Stuff/Spartan-3E%20Libraries%20Guide%20for%20Schematic%20Designs.pdf

There are plenty of tutorials for Xilinx ISE.  The interface looks
intimidating, but isn't once you watch the tutorials.  Syntax of VHDL
and Verilog isn't intimidating either, once you learn the languages
(or just have a basic understanding of computer programming languages
and boolean logic).  Error reports can be confusing, but the ISE will
search the web for a clear(er) description of errors.


>
> One of my hopes was to synthesize a 6809 coprocessor board with the gen-u-ine
> CPU in the ASIC adapter.  Alex had suggested this early on as a good candidate
> for schematic capture based synthesis.  Not sure if he ever did it or not.
>

It should be.  The schematic is fairly simple.  Putting a 6809 on
board eliminates the need for a CPU IP core.

I think support/tutorial from Applelogic.org will never come, so we
have to figure it out for ourselves...

Would be nice to set up a SKYPE chat where we can share knowledge and
ideas.

http://tech.groups.yahoo.com/group/applefpga/