Re: 6502 Delay Loops using Applesoft

[Allen Bong <allenbsf6502@gmail.com>]

On Nov 26, 2:16 pm, "Michael J. Mahon" <mjma...@aol.com> wrote:
> Allen Bong wrote:
> > Hi,
>
> > Has anyone written a gereral delay loop calculating program in
> > Applesoft, to calculate the constants required to gererate the
> > required time delays in 6502 codes?
> > For example:
>
> > ZP1              EQU   $XX      ;ANY UNUSED ZP ADDR
> > ZP2              EQU   $XX      ;ANY UNUSED ZP ADDR
>
> > DELAY         PHA
> >                     LDA  K1
> >                     STA  ZP1
> > LOOP1         LDA  K2
> >                     STA  ZP2
> > LOOP2         DEC  ZP2
> >                     BNE  LOOP2
> >                     DEC  ZP1
> >                     BNE  LOOP1
> >                     PLA
> >                     RTS
>
> > I have searched through google and never found one.  But there are
> > some written using JAVA for other cpu and mcu.  I ask because I needed
> > them from time to time doing small projects and if someone has already
> > written one, I wouldn't have to reinvented the wheel or else........
>
> > Thank you.
>
> The sound synthesis routines I use generate cycle-accurate pulse widths.
> The assembly language code for them is generated by an Applesoft program
> that schedules the "work" instructions around the precisely timed events
> using delay padding instructions where necessary.
>
> I have not created any "general purpose" code for generating delays,
> since every situation is different and usually requires adapting the
> code to the specific situation.
>
> I began a few years ago to write an article on the general topic of
> cycle-accurate computing, considering several different cases that
> arise in practice.  For several reasons, I never completed this article,
> but I'm happy to make my draft available to you.  (I've emailed the
> Word document to you.)
>
> The most general technique for generating arbitrary cycle delays is
> the use of nested loops, as you suggest.  To obtain greater resolution,
> I generally use index register loops (5 cycles per inner loop).  With
> nexted loops and arbitrary initialization of X and Y, it is possible to
> create compact delay routines with 5-cycle resolution and a range of up
> to over 328000 cycles.  The total delay can then be easily padded to
> single-cycle accuracy by adding a few extra instructions outside the
> loop.
>
> If a run-time variable precise delay is needed, a combination of
> computed loop constants and branching to a variable target can
> achieve any desired delay at the cost of adding the computation
> code outside the timed operation(s).
>
> If you already have a loop structure in mind, then algebra will
> allow you to find the equation for the initial constants, as well
> as reveal the resolution available.  Each loop will have its unique
> timing equation, requiring its own constant computation.
>
> In the example you give, you re-initialize ZP2 for each iteration
> of LOOP1.  This is not necessary, and it will increase the range
> of delays if you only initilize it once and let it cycle from 255
> for all subsequent iterations.
>
> The resolution of your loop is 8 cycles.
>
> For my usual loop:
>
>         ldy  #ycnt   ; (2 cycles)
>         ldx  #xcnt   ; (2 cycles)
> delay  dex          ; (2 cycles)
>         bne  delay   ; (3 cycles in loop, 2 cycles at end)
>         dey          ; (2 cycles)
>         bne  delay   ; (3 cycles in loop, 2 cycles at end)
>
> Notice that only the duration of the first X loop is set by �xcnt�,
> since X is not reloaded after the first pass through the loop.  This
> is actually an advantage, since all Y loop iterations after the first
> will incur the maximum delay in the X loop, and the first iteration
> can be used to �trim� the total delay with a resolution of 5 cycles.
>
> When this nested loop is executed, for all but the final Y iteration,
> the DEY and BNE will add another 5 cycles to the loop execution time,
> but on the final iteration, they will only add 4 cycles.  As a result,
> the execution time for this nested delay loop is 2 + 2 + (5 * xcnt) - 1
> + (ycnt-1) * (5 * 256 � 1 + 5) + 4, or, after simplification:
>
>          1284 * (ycnt - 1) + 5 * xcnt + 7
>
> where �xcnt� and �ycnt� can range from 1 to 256 (which is represented by 0).
>
> This is the kind of analysis which can be applied to any such nested
> loop scheme, and the equation can then be solved for ycnt and xcnt
> (in that order).
>
> -michael
>
> NadaNet and AppleCrate II: parallel computing for Apple II computers!
> Home page:http://home.comcast.net/~mjmahon
>
> "The wastebasket is our most important design
> tool--and it's seriously underused."- Hide quoted text -
>
> - Show quoted text -

Thank you very much Michael,  for providing such informative info to
me.  I will read through your post and document carefully.

I will reply here if there is any more questions.
Best regards,

Allen