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Re: ARM and 6502



Regnirps writes ...
> 
> Rubywand <rubywand@swbell.net> wrote:
> 
> >     Digital had a data sheet for the SA1100. It seems to be similar to
> >the '110 so, evidently, the '110 has a 32-bit data bus. How does an
> >8-bit uP emulation utilize 32-bit wide memory?
> 
> The ARM instructions that load and store can all have a 'B' on the end which
> means Byte, so you just treat it like byte wide memory where the 6502 code is
> (or the whole 6502 memory space) and 32 bit mem in the emulation interpreter.
> I'll put up a little example of code that MIGHT work since it has been a while
> and the combinations of modes and registers for the ARM are simple but legion.
>

     That could be helpful.

     It sounds like you are saying 6502 code could be 'broadside loaded'
so to speak. For example, a code sequence like A9 77 85 FF might arrive
in a single 32-bit read. And, since you would want byte addressability,
all memory reference commands would automatically parse out as
references to one of four bytes in a 32-bit word.

     If the above works, you would gain speed on the instruction and
data load side of the simulation and lose speed on mem writes (since you
would always have to do a mem read first).  Is this how the simulation
would work? 



Rubywand