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Re: Transwarp GAL chips

Subject: Re: Transwarp GAL chips
From: toddpw@ugcs.caltech.edu (Todd P. Whitesel)
Date: 1998/02/14
Newsgroups: comp.sys.apple2
Organization: California Institute of Technology, Pasadena
References: <6bvf6q$c64$1@newssvr07-int.news.prodigy.com> <19980213002100.TAA28256@ladder03.news.aol.com>

ecitnerppa@aol.com (Ecitnerppa) writes:

>The Transwarp may or may not use the /RESET pin on 8K SRAMs (when present). It
>is implimented on the 8K configuration, replaced by an address line on 32K
>implimentation, yet only one of my 8K cache boards has "resettable" SRAM chips.

Huh? 6264/62256 series SRAMs don't have a reset pin. The 6264 has either
chip-selects ("enable" pins) or no-connects where the 62256 has extra
address lines.

There are "pseudo-static" RAMs that have a _refresh_ pin but I didn't think
the TWGS ever used those...

Todd Whitesel
toddpw @ ugcs.caltech.edu

References:
- Transwarp GAL chips
  - From: "no1inParticular" <compuser@prodigy.net>
- Re: Transwarp GAL chips
  - From: ecitnerppa@aol.com (Ecitnerppa)

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