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Re: GCR specification - where?
Matthew T. Russotto wrote:
<snip>
> In article <330430CF.23DE@siemens.at>,
> Dr. Wolfgang Otrebski <wolfgang.otrebski@siemens.at> wrote:
> }Matthew T. Russotto wrote:
> }<snip>
> }
> }> Sure they are. Just count cycles :-). Though somewhere in the dusty
> }> attic of my head I remember that it takes 32 cycles to write a disk
> }> nibble and 40 seconds to write a self-sync nibble. So first you write
> }> a few self-syncs, then every 32 cycles you need to load the data latch
> }> with a new value until you're done writing nibbles. Then I think you
> }> write some more self-syncs, but I'm not sure. In any case, it's all
> }> in the book.
> }seconds above read cycles ... 40 seconds would be awfully long :-)
>
> Oops.. hey, I got it right two out of three times. What's a factor of
> a million here or there?
>
> I think that 13-sector disks may have had a 9-bit self-sync nybble
> because the P6 prom couldn't accept two zeros in a row. I think that
> means more self-sync nybbles had to be written, but I'm not sure.
I seem to remember the same information but I'd have to look it up
to be really certain
>
> I've seen one copy protection scheme which apparently used no
> self-sync nybbles at all, or at least very few.
<snip>
When it comes to copy protection the possibilities offered by a
hardware like the disk][ and its controller are simply _amazing_
BTW, I've seen such protection schemes also but the weirdest IMHO
was obviously done by writing an address field header followed by
some arbitrary bits left there by simply doing nothing, waiting for
sixteen cycles (half a nybble) then writing the address field.
Actually _did_ copy it with locksmith drawing bits on paper and
reconstructing the disk image in the nibble editor ...
Have Fun,
wolfgang
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