Re: R65C02 PI

[lstrand@netcom.com (Leif Strand)]

In article <502orp$e24@pith.uoregon.edu>,
Neil Parker <nparker@cie-2.uoregon.edu> wrote:
>Had zero-page,X addressing been used for those instructions, there wouldn't
>have been any problem, since zero-page,X addressing wraps within zero page
>on the 65816 as long as the direct page register is page-aligned (as it
>almost always is in emulation mode).  It would have been a couple of cycles
>faster too.

Note that the processor must be in emulation mode for "zpg,x" or "zpg,y"
to wrap within the zero page (in addition to the direct page register
being page aligned). 

In native mode, "zpg,x" never wraps, even when the dp register is
page-aligned.  QuickDraw frequently takes advantage of this:

  ldx #$200   ;access third page of dp space
  lda $EC,x   ;"dirty flags"


--Leif