Re: Installing GS RAM card in slots 1-7

[Eric Rucker <bhtooefr@gmail.com>]

On May 22, 3:28 pm, "Charlie" <charlieD...@verEYEzon.net> wrote:
> "Michael J. Mahon" <mjma...@aol.com> wrote in messagexbCdnQw1sLMs1GvWnZ2dnUVZ_tGdnZ2d@giganews.com">news:xbCdnQw1sLMs1GvWnZ2dnUVZ_tGdnZ2d@giganews.com...
>
> > It wouldn't be possible to provide 80-column and DHR functionality
> > from the peripheral bus, since both the AUX memory access and the
> > main memory access must occur in the same cycle.
>
> I'm having trouble getting my mind wrapped around this statement.
> Could you clarify it?  Specifically why is it necessary to access
> both the AUX memory and main memory in the same cycle?
>
> Charlie

The MMU maps the AUX memory directly into the main memory space, as I
understand. So, any memory accesses go where the MMU is set to, and
all the RAM needs to be accessible at once to do it, I believe, or you
could get a crash if you're accessing the wrong memory.

I may be completely wrong, but that's my understanding.