Re: CACHE????

[wbaguhn@nyx10.cs.du.edu (Will Baguhn)]

In article <slrn4tluqv.fvb.scraft@bigpapa.nothinbut.net>,
 <scraft@bigpapa.nothinbut.net> wrote:
>In article <4ra3sh$aac@newsbf02.news.aol.com>, RUBYWAND wrote:
>>In article <Pine.SOL.3.91.960628084449.25061A-100000@moose>, Paul Schultz
>><pschultz@med.wayne.edu> writes:
>>
>>>.... I also recall posts about people piggy backing sram chips
>>>on top of the normal cache chips to give 128K. But, this seems a little
>>>bizaar and I always discounted this idea. (Apparently from what I
>>remember
>>>they claimed to physically solder the legs from one chip to the legs of
>>>the chip below it!).
>>>
>
>And from the really bizarre "no way you can do that" department, 
>what if we could put that 128k cache RAM somewhere on the GS
>mainboard itself to speed up some operation that runs at 1.0MHz
>but doesn't have to?  I have not slept in 24 hours, but was
>just thinking that it would be something to have the full machine
>sped up all the time instead of dropping to 1.0MHz for timing
>and stuff.  Or cache the 128k that is in the Mega II chip subset
>to do something..... I don't know what.
>
>Ah, to hell with it.  Just make a 256k ZipGS cache and be done
>with it already.  :)
>
>-- 
>Respect for the Classics:  IntellivisionTurboGrafx ||"If I came back as a
>TurboExpressApple][Amiga1000Atari5200Atari7800Lynx || Dolphin, would you
>                                                   || listen to me then?"
>Kid (scraft@bigpapa.nothinbut.net)                 ||       - O{+>
>
>
>

Heck... as long as we're dreaming, how about an 8 Mhz bus with a 15 Mhz
processor on it, ON the mainboard?  Since we're building a new board
anyway (my dream!  we can do it!), how about something more towards actual
slot arbitration (the ROM 3 idea that slot 1 or 2 needed to be set to appletalk
for appletalk to run is preposterous)?  up to 15 megs RAM on the main board?
new memory manager to support it?  FULL DMA?


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                                      --- SPQR (wbaguhn@nyx.net)