On May 5, 4:00 am, demp...@actrix.gen.nz (David Empson) wrote:
Not trying to put you off, but some points to consider...
That's precisely the reason why I asked, and by your reply I'm fairly
confident I'm not smart enough to pull it off. It was enough that I
had a 6502 talking on a breadboard and came up with the lame-brained
scheme to begin with. ;-)
Probably in CPLD or FPGA territory to get a reasonably compact
implementation of the logic.
At that point, you could build the entire 65C02 core in the FPGA along
with the memory, and accelerator logic. Save a mess of chips, too.
I'm not trying to get into the "purity" argument, but the modern FPGA
does seem to lend itself to that idea quite well. And it would be
quite an acid test for an FPGA core if it could successfully run a
real Apple II's software AND hardware.