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Re: memory switches
In article <1995Nov7.155913.3304@freenet.victoria.bc.ca>,
John Edward Flanders <ur448@freenet.Victoria.BC.CA> wrote:
>
> Could anyone please explain the locations and functions of the memory bank
> switches on an Apple //e with 128k memory?
I assume you are referring to the IIe-specific bank switches relating
to the 64K auxiliary memory, and not the $D000-$FFFF soft-switches,
which are the same as the ][/][+ with a language card installed. (I
have described these anyway.)
Before mentioning the soft-switches, I should first cover the firmware
routines that are normally used to access auxiliary memory. These
routines are generally easier to use than trying to control the
soft-switches directly, as it avoids the problem of your memory
switching out from underneath you while you are trying to execute code!
Two special routines are provided in the IIe firmware. They are
dependent on the built-in 80-column firmware, so they might not be
available if a card with firmware on it is installed in slot 3.
AUXMOVE ($C311) is used to copy data either way between main and
auxiliary memory (in the $0200-$BFFF area).
Before calling AUXMOVE, the following zero page locations must be set up:
$3C - $3D Source starting address (low byte, high byte)
$3E - $3F Source ending address (low byte, high byte)
$42 - $43 Destination startion address (low byte, high byte)
In addition, the carry flag must be set to indicate the direction of
the move: C=1 to move from main to auxiliary memory, C=0 to move from
auxiliary to main memory.
XFER ($C314) is used to transfer execution between code running in main
and auxiliary memory.
Locations $03ED and $03EE must be set to the address of the destination
routine in the other bank. The carry and overflow flags must be set
as follows: C=1 to transfer execution from main to auxiliary memory,
C=0 for auxiliary to main memory; V=1 to use auxiliary zero page,
stack and language card, V=0 to use main zero page, stack and language
card.
When using this routine, it is also necessary to save and restore the
main and auxiliary stack pointers, which are stored at locations $0100
and $0101 respectively (both in auxiliary memory).
Since these routines execute from the I/O space, they are able to
access both banks without causing problems. For code executing from
main memory, it is possible to write to auxiliary memory, but reading
from auxiliary memory is not directly possible (your code is switched
out).
Auxiliary Memory Soft-switches
==============================
The IIe-specific soft switches all use three I/O locations. A pair of
locations set the soft switch to the "on" and "off" states by writing
to the location (value is irrelevant). The third location allows
software to read the current state of the switch, by examining bit 7
of the returned value (the switch is "on" if bit 7 is set).
The softswitches related to auxiliary memory bank switching are as
follows:
Name OFF location ON location READ location
RAMRD $C002 (write) $C003 (write) $C013 (read bit 7)
RAMWR $C004 (write) $C005 (write) $C014 (read bit 7)
ALTZP $C008 (write) $C009 (write) $C016 (read bit 7)
80STORE $C000 (write) $C001 (write) $C018 (read bit 7)
PAGE2 $C054 (r/w) $C055 (r/w) $C01C (read bit 7)
AN3 $C05E (r/w) $C05F (r/w) not available
The RAMRD switch determines which bank is accessed for READ operations
in the address range $0200 to $BFFF. If this switch is OFF, main
memory is read. If this switch is ON, auxiliary memory is read.
The RAMWR switch determines which bank is accessed for WRITE operations
in the address range $0200 to $BFFF. If this switch is OFF, main
memory is written. If this switch is ON, auxiliary memory is written.
The ALTZP switch determines which bank is accessed for both READ and
WRITE operations in the address ranges $0000 to $01FF (zero page and
stack memory) and $D000 to $FFFF ("language card"). If this switch is
OFF, main memory is accessed. If this switch is ON, auxiliary memory
is accessed.
In addition to these three switches, there are special facilities to
simplify access to the 80-column text buffer (half of which is in
auxiliary memory at $0400-$07FF) and first page of the double hi-res
graphics buffer (half of which is in auxiliary memory at $2000-$3FFF).
These facilities are controlled by the 80STORE switch. If 80STORE is
OFF, then auxiliary memory switching is controlled only by the RAMWR
and RAMWR switches.
If 80STORE is ON, then the PAGE2 switch controls the bank accessed in
the $0400-$07FF area. If PAGE2 is OFF, main memory is accessed. If
PAGE2 is ON, auxiliary memory is accessed. This overrides the current
setting of RAMRD and RAMWR.
Note: PAGE2 normally selects the displayed text or graphics page (1 or
2). This function is disabled while 80STORE is active, and only page 1
can be displayed.
Note also that the 80STORE bank switching function is independent of
the display of 80-column text and double hi-res graphics mode, which
involves the 80COL soft switch ($C00C write = OFF, $C00D write = ON,
$C01F = read).
The AN3 switch is involved in the use of double hi-res graphics mode.
If AN3 is OFF ($C05E), double hi-res graphics is ENABLED. Double
hi-res graphics will also be displayed if 80COL is ON and HIRES
($C057) is ON.
If AN3 is ON ($C05F), double hi-res graphics is DISABLED. Standard
Hi-res graphics will be displayed, even if 80COL is ON.
If AN3 is OFF and 80STORE is ON, then PAGE2 controls whether main or
auxiliary memory is accessed in the $2000-$3FFF area (as with the
80-column text buffer).
If AN3 is OFF and 80STORE is also OFF, then PAGE2 selects which
text/graphics page is displayed, as normal. This combination allows
double hi-res graphics page 2 to be displayed. This page ($4000-$5FFF
in both banks) does not have a special bank switch mechanism, so other
methods must be used to access the two halves of its address space.
(The same applies to 80-column text page 2, at $0800-$0BFF in both
banks.)
In AN3 is ON (double hi-res graphics disabled), then 80STORE has no
effect on memory mapping in the $2000-$3FFF area.
Note that the AN3 switch also controls the state of annunciator output
number 3 on the internal 16-pin game connector.
$C100-$CFFF ROM bank switching
==============================
The IIe has internal ROM in the $C100-$CFFF area. Locations
$C300-$C3FF and $C800-$CFFF contain the 80-column firmware. The other
areas ($C100-$C2FF and $C400-$C7FF) contain monitor extensions and
self-test routines.
This memory area is normally occupied by the ROM on cards in I/O
slots. The IIe has two soft-switches that control what appears in
these areas.
Name OFF location ON location READ location
SLOTCXROM $C006 (write) $C007 (write) $C015 (read bit 7)
SLOTC3ROM $C00A (write) $C00B (write) $C017 (read bit 7)
The SLOTCXROM switch controls locations $C100-$C2FF and $C400-$C7FF
(slots 1, 2, 4, 5, 6 and 7). If this switch is OFF, the normal slot
address space applies. If this switch is ON, the internal ROM is
enabled for these areas.
The SLOTC3ROM switch controls locations $C300-$C3FF (slot 3). If this
switch is OFF, the internal 80-column firmware is enabled in slot 3.
If this switch is ON, the slot 3 firmware is enabled.
The $C800-$CFFF area is bank switched between slots in the standard way
- it is enabled for slot n when $Cn00-$CnFF is accessed (if this area
is implemented for the slot in question) and is disabled for all slots
when $CFFF is accessed (it is necessary to do this first, to ensure
that the bank-swtich area is not enabled for multiple slots). The
internal 80-column firmware will be enabled in this area if slot 3 is
set to "internal" mode, and $C300-$C3FF is accessed.
Language Card Bank Switching
=============================
The IIe has built-in emulation of the "language card" that is used in
an Apple ][ or ][+ to increase the total memory to 64K.
The language card provides 16K of additional RAM that is bank-switched
into the $D000-$FFFF area, which is normally occupied by the firmware
(Applesoft BASIC and the monitor firmware). This is only 12K of
address space: the extra 4K is provided via a second bank at $D000-$DFFF.
In a 128K IIe, the language card structure is repeated in both main
and auxiliary memory, and the same soft switches control both banks.
The active bank is controlled by the ALTZP soft switch (described
earlier).
The language card soft-switches are as follows. Note that they are
the same for a ][ or ][+ with a language card in slot 0, except that
the "read" locations are not available. An Applesoft/Integer BASIC
ROM card uses a subset of these locations (it only supports
$C080/$C081).
All of these soft switches may be controlled with a read or write
access. They control which areas are accessed for subsequent read and
write operations in the $D000-$FFFF. "bank 1" and "bank 2" refer to
the two alternative 4K RAM banks at $D000-$DFFF. $E000-$FFFF accesses
the same memory area no matter which bank is selected.
Name Location Read Write
LC2RD $C080 RAM, bank 2 -
LC2WR $C081 ROM RAM, bank 2 (see below)
ROMONLY2 $C082 ROM -
LC2RW $C083 RAM, bank 2 RAM, bank 2 (see below)
LC1RD $C088 RAM, bank 1 -
LC1WR $C089 ROM RAM, bank 1 (see below)
ROMONLY1 $C08A ROM -
LC1RW $C08B RAM, bank 1 RAM, bank 1 (see below)
In summary:
$C082 or $C08A totally disables the language card RAM. The ROM is
enabled for read, and the RAM is completely disabled. The two
locations are identical in function.
$C080 or $C088 enables the language card RAM in "write protected" mode
(acting as a ROM). This is used by DOS 3.3 when Integer BASIC is
loaded into the language card. The two locations select different 4K
RAM banks in the $D000-$DFFF area.
$C081 or $C089 enables the language card RAM in "write only" mode,
with the ROM enabled for read operations. This is used when executing
code in ROM, but allowing data to be copied into the language card
(e.g. when copying parts of the ROM into the language card). The two
locations select different RAM banks in the $D000-$DFFF area.
$C083 or $C08B enables the language card RAM in "read/write" mode,
with the ROM completely disabled. This is used when exeucting an
operating system (e.g. ProDOS or Pascal) from the language card space,
where part of the RAM is used as buffering memory, for example. The two
locations select different RAM banks in the $D000-$DFFF area.
The "write enable" locations ($C081, $C083, $C089 and $C08B) require a
special sequence to enable write access. Two or more consecutive READ
accesses to the location are required to enable writes (e.g. two LDA
instructions).
The current state of these soft-switches can be detected on the IIe by
reading bit 7 of the following locations:
$C011 Read bank 2 select state (set for bank 2, clear for bank 1)
$C012 Read RAM read enable state (set for RAM read, clear for ROM read)
It is not possible to read the write-enable state of the language card RAM.
--
David Empson
dempson@actrix.gen.nz
Snail mail: P.O. Box 27-103, Wellington, New Zealand